pic18f4550

Bonjour votre site est trés interresant et deplus je travaille sur ce pic donc j'ai compris plein de chose grace a votre site.
Mais je me retrouve a quelque point qui me sont encore difficile d'acces et en particulier bien que l'adc (analog to digital convertor) .

Mon projet c'est d'effectuer une convertion A/N et ensuite lecture par Pc et avoir une vitesse maximal possible pour le transfert de donnée et avoir une cadence d'echantillonage maximal.
merci
plz help

Oui, Mais.... Quel est la question?

pour la programation(MPLAB c18), comment je ferai pour programmer pic18f4550 pour faire la conversion A/N

sur le site tu peux telecharger le zip avec le firmware du PIC. il suffit donc d'aller sur user.h et .c pour regarder comment on met en oeuvre le A/N controler. voir aussi la config des fuses dans le main.

Bonjour,

Je pense que l'exemple sur ce site est assez explicite non?

Attention qu'il y a deux exemples sur le site, un utilisant le driver de microchip, l'autre le drive HID, ils sont bien différencié par le nom du fichier!

merci j'ai profité de l'exemple HID
mais lors du compilation j'ai eu une erreur au niveau de linker que je comprend pas


MPLINK 4.01, Linker
Copyright (c) 2005 Microchip Technology Inc.
Error - could not find definition of symbol 'ep1Bi' in file 'C:\Documents and Settings\oussama\Bureau\projet3\projet3.o'.
Errors : 1

well if I add c018i.o object the error become


MPLINK 4.01, Linker
Copyright (c) 2005 Microchip Technology Inc.
Error - section '_entry_scn' type is non-overlay and absolute but occurs in more than one input file.
Errors : 1

dans usbcfg.h j'ai ca
#define HID_INTF_ID 0x00
#define HID_UEP UEP1
#define HID_BD_OUT ep1Bo
#define HID_INT_OUT_EP_SIZE 64
#define HID_BD_IN ep1Bi
#define HID_INT_IN_EP_SIZE 64
#define HID_NUM_OF_DSC 1
#define HID_RPT01_SIZE 47
!!!!!!!!!!!!
merci

Visiblement il manque une définition de 'ep1Bi' dans le fichier objet
mais comment je fait pour l'ajouter !!?

repart de zéro, en créant un projet, puis en incluant tout les fichiers du firmware.
pense à configurer le directories dans project->BUILD OPTION-> PROJECT
perso moi j'ai eu une erreur dans les fuses(non compréhensible) j'ai refait toute la config et ca à marcher :

//CONFIG FUSE PIC18F4550

//PLL Prescaler Selection bits:
#pragma config PLLDIV = 5 //Divide by 5 (20 MHz oscillator input)

//CPU System Clock Postscaler:
#pragma config CPUDIV = OSC1_PLL2
//CPUDIV = OSC1_PLL2 //[OSC1/OSC2 Src: /1][96 MHz PLL Src: /2]

//USB Clock Selection bit (used in Full Speed USB mode only; UCFG:FSEN = 1):
#pragma config USBDIV = 2 //USB clock source comes from the 96 MHz PLL divided by 2

//Oscillator Selection bits:
#pragma config FOSC = HSPLL_HS //HS oscillator, PLL enabled, HS used by USB

//Fail-Safe Clock Monitor Enable bit:
#pragma config FCMEN = OFF //Fail-Safe Clock Monitor disabled

//Internal/External Oscillator Switchover bit:
#pragma config IESO = OFF //Oscillator Switchover mode disabled

//Power-up Timer Enable bit:
#pragma config PWRT = OFF //PWRT disabled

//Brown-out Reset Enable bits:
#pragma config BOR = ON //Brown-out Reset enabled in hardware only (SBOREN is disabled)

//Brown-out Voltage bits:
#pragma config BORV = 3 //Minimum setting

//USB Voltage Regulator Enable bit:
#pragma config VREGEN = ON //USB voltage regulator enabled

//Watchdog Timer Enable bit:
#pragma config WDT = OFF // HW Disabled - SW Controlled

//Watchdog Timer Postscale Select bits:
#pragma config WDTPS = 32768 // 1:32768

//MCLR Pin Enable bit:
#pragma config MCLRE = ON //MCLR pin enabled; RE3 input pin disabled

//Low-Power Timer 1 Oscillator Enable bit:
#pragma config LPT1OSC = OFF //Timer1 configured for higher power operation

//PORTB A/D Enable bit:
#pragma config PBADEN = OFF //PORTB<4:0> pins are configured as digital I/O on Reset

//CCP2 MUX bit:
#pragma config CCP2MX = OFF //CCP2 input/output is multiplexed with RB3

//Stack Full/Underflow Reset Enable bit:
#pragma config STVREN = ON //Stack full/underflow will cause Reset

//Single-Supply ICSP Enable bit:
#pragma config LVP = OFF //Single-Supply ICSP disabled

//Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit:
#pragma config ICPRT = OFF //ICPORT disabled

//Extended Instruction Set Enable bit:
#pragma config XINST = OFF //Instruction set extension and Indexed Addressing mode disabled (Legacy mode)

//Background Debugger Enable bit:
#pragma config DEBUG = ON //Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins

//Code Protection bit Block 0:
#pragma config CP0 = OFF //Block 0 (000800-001FFFh) not code-protected

//Code Protection bit Block 1:
#pragma config CP1 = OFF //Block 1 (002000-003FFFh) not code-protected

//Code Protection bit Block 2:
#pragma config CP2 = OFF //Block 2 (004000-005FFFh) not code-protected

//Code Protection bit Block 3:
#pragma config CP3 = OFF //Block 3 (006000-007FFFh) not code-protected

//Boot Block Code Protection bit:
#pragma config CPB = OFF // Boot block (000000-0007FFh) not code-protected

//Data EEPROM Code Protection bit:
#pragma config CPD = OFF //Data EEPROM not code-protected

//Write Protection bit Block 0:
#pragma config WRT0 = OFF //Block 0 (000800-001FFFh) write-protected

//Write Protection bit Block 1:
#pragma config WRT1 = OFF //Block 1 (002000-003FFFh) not write-protected

//Write Protection bit Block 2:
#pragma config WRT2 = OFF //Block 2 (004000-005FFFh) not write-protected

//Write Protection bit Block 3:
#pragma config WRT3 = OFF //Block 3 (006000-007FFFh) not write-protected

//Boot Block Write Protection bit:
#pragma config WRTB = OFF //Boot block (000000-0007FFh) write-protected

//Configuration Register Write Protection bit:
#pragma config WRTC = OFF //Configuration registers (300000-3000FFh) not write-protected

//Data EEPROM Write Protection bit:
#pragma config WRTD = OFF //Data EEPROM not write-protected

//Table Read Protection bit Block 0:
#pragma config EBTR0 = OFF //Block 0 (000800-001FFFh) not protected from table reads executed in other blocks

//Table Read Protection bit Block 1:
#pragma config EBTR1 = OFF //Block 1 (002000-003FFFh) not protected from table reads executed in other blocks

//Table Read Protection bit Block 2:
#pragma config EBTR2 = OFF // Block 2 (004000-005FFFh) not protected from table reads executed in other blocks

//Table Read Protection bit Block 3:
#pragma config EBTR3 = OFF // Block 3 (006000-007FFFh) not protected from table reads executed in other blocks

//Boot Block Table Read Protection:
#pragma config EBTRB = OFF // Boot block (000000-0007FFh) not protected from table reads executed in other